Signal integrity optimisation
via simulation of the integrated circuit, PCB, connector, cable and system level
- Electrical thermal co-simulation at PCB/IC package level
- Optimisation of EMC at PCB/IC package level
- Design of robust power supply network at PCB/IC package level
- Simulation of DDR routing at PCB/IC package level
- Simulation of High-Speed serial link routing at PCB/IC package level
- Analysis of a complete system – PCB/package/connector/cable
Friday, October 4, 14:00 - 17:00
Cadence Design Systems
Srdjan Djordjevic
Application Engineering Architect, Multi-Physics
System Analysis
Srdjan Djordjevic has over 25 years of experience in signal integrity, power integrity, EMC and thermal analysis of the IC PKG/PCB systems. He worked at Infineon Technologies as a Team Leader of the Customized Memory Module Design group. Srajan was one of the first users of Sigrity tools in Europe for PCB SI/P| analysis (since 2001), and has been at Cadence since 2010, supporting customers in SI/PI/EMC/thermal analysis of their IC PKG/PCB systems.
Registration required
During the tutorial, real work life examples will be discussed.
Please contact twepp@cern.ch if you would like to submit your design files to a repository from which a subset of projects can be select to be shown during the tutorial.
